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Synchronous dynamic random-access memory
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SSE4
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Penryn (microprocessor)
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http://intel.wingateweb.com/US08/published/sessions/MASS006/SF08_MASS006_100s.pdf
Anchor text: DDR4 PDF page 23
https://intel.wingateweb.com/published/BMAS005/BMAS005_100Eng.pdf
Anchor text: Tuning for Intel SSE4 for the 45nm Next Generation Intel Core Microarchitecture